If you have ever attended a circuit design course or conference, you probably heard the phrases “lost art” or “black arts” mentioned at some point. As an IC design student, I was immediately attached to the “lost” and “black” part. It was only after several tape-outs when I began to truly appreciate the “art” half of those phrases.
Besides the artistic process of creating complex circuits/systems from one’s imaginations, the actual DRAWINGs of circuit schematics and layouts are the key artistic forms through which designers’ ideas become physical realities. I am sure anyone who has seen a die photo marveled at the beauty of this tiny piece of silicon with metal patterns, and yet hardly anyone associates these human creations with art, let alone realizing that like all paintings these chips all began with some lines and polygons in schematics (or even whiteboards/papers).
I was fortunate enough to have interned and worked full-time at several chip design power houses since my Master’s years. All the neat circuit tricks I learned from seasoned designers definitely solidified my passion for circuit design, but my biggest takeaways have always been how good designers create, polish and maintain their schematics/layouts. Nowadays, my constant fuel is the schematic/layout drawing game I play during each project to create pieces of art I can be proud of.
This Circuit Artists blog series is intended to share my personal learnings and design habits when it comes to drawing schematics/layouts. I hope it would be interesting to some students/young professionals and keep them motivated. People in the circuit design field understand the difficulty in recruiting new talents nowadays. In my humble opinion, schematic/layout drawing when designing circuits could be just as fun (if not more) as writing thousands lines of codes (and yes, I am saying writing well structured code is fun). The best case scenario for this series is to tip the scale for a few students deciding on his/her major, realizing IC design is an art just as colorful and stunning to look at every step of the way, from schematics to die photos.
![Code Quality [credit: xkcd]. This is equally true for bad schematics/layouts except the “style guide” is non-existent for circuit designs](https://i0.wp.com/imgs.xkcd.com/comics/code_quality.png?w=676&ssl=1)
There is no particular order planned for the following entry topics, but hopefully as time goes on these can be more organized and a structure will self-manifest
- Symbols: the lexicon of schematics
- To wrap or not to wrap: schematic hierarchy and how to use it to your advantage
- AI’s past and future in assisting IC design
- Schematic as documentation: how to keep your schematics relevant when you aren’t around
- Draw it like you see it: schematics and layout duality
- Express yourself: have fun with symbols, notes, and inside references
- Metal resistors – your unexpected friend in wire management
- The unsung heroes – dummies, decaps, and more
- Top down or bottom up – where should designs begin?
- Towards open-source circuit design: schematics/layout reuse for democratizing IC design
- More to come …
To paraphrase the father of code refactoring Martin Fowler – any one can draw schematics that a SPICE simulator can understand, good designers draw schematics that humans can understand. Stay tuned!
Great content, Kevin Zheng . I look forward to reading on methodologies and tools to do system level serial link analysis / design in your blog.
Suggestion: For analog, “mixed-signal”, or RF designs, don’t pretend that there is a magical “ground” node that has no resistance/inductance. Just as you draw explicit connections for the signals between elements, do the same for the “returns” (for which the “ground” network is often convenient). It is certainly tempting to just put a “ground” symbol whoever needed, but you run the risk of unnoticed “ground loops”, cross-talk, etc.
Excellent suggestion Michael. My design experience has mostly been in broadband SerDes, which definitely limits the type of schematic drawing rules I follow. This ground issue you mentioned is definitely crucial for RF and perhaps some more high precision applications. In the future I hope to gather more insights like this from experts in other fields and consolidate more schematic tips for specific circuits. I think this will really turn the blog from a “generic” guide to a helpful handbook
Tell me about it, I have been designing IC since 2016, and I love it, it like a playing game to me. Firstly, I should find a good idea that should be novel. Second, theoretical calculations which prove the system reliability. Thirdly, drawing the schematics using the Cadence environment and run the simulations via ADL.
After confirming the Circuits further, such as parametric simulation, corner simulation with process variation, and Monto calo simulation, ect… I have make related layouts, and this will be most interesting. After passing DRC and LVS, I run the PEX simulation. IF I can achieve same results that I already obtained using the ADL, it will be called that mission accomplished..
To be honest, it brings back memories of being a kid and just drawing stuff on a piece of paper, except you make something real and tangible in this circuit design 🙂